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misc:acronyms [2017/11/16 11:19] chick [ADEPT Terms] |
misc:acronyms [2019/01/11 11:11] (current) edwardw |
=====ADEPT Terms===== | =====ADEPT Terms===== |
| |
* **ADEPT**: Agile hardware Design | * **ADEPT**: **A**gile **D**esign of **E**fficient **P**rocessing **T**echnologies |
* **BAG**: **B**erkeley **A**nalog **G**enerator: A Chisel like technology for generating analog circuits. | * **BAG**: **B**erkeley **A**nalog **G**enerator: A Chisel like technology for generating analog circuits. |
* **BOOM**: **B**erkeley **O**ut-of-**O**rder **M**achine | * **BOOM**: **B**erkeley **O**ut-of-**O**rder **M**achine |
* **BROOM**: Berkeley Resilient Out-of-Order Machine | * **BROOM**: **B**erkeley **R**esilient **O**ut-of-**O**rder **M**achine |
* **Chisel Range-analysis**: Instead of declaring a width for a wire instead specify minimum and maximum values. | * **Chisel Range-analysis**: Instead of declaring a width for a wire instead specify minimum and maximum values. |
* **Chisel**: Constructing Hardware in a Scala Embedded Language, a generator approach to circuit design. | * **Chisel**: **C**onstructing **H**ardware **i**n a **S**cala **E**mbedded **L**anguage, a generator approach to circuit design. |
* **Concolic**: A form of testing that combines the use of **Conc**rete and Symb**olic** values | * **Concolic**: A form of testing that combines the use of **Conc**rete and Symb**olic** values |
* **Differentiable Halide**: | * **Differentiable Halide**: |
* **Diplomacy**: | * **Diplomacy**: Parameter-negotiation library found in rocket-chip |
* **DSSoC**: Domain-specific System on Chip | * **DSSoC**: **D**omain-**s**pecific **S**ystem **o**n **C**hip |
* **EAGLE**: | * **EAGLE**: |
* **F1**: | * **F1**: AWS Instance Type with an attached FPGA |
* **FCL**: Firrtl Command Language, a scripting language for firrtl transforms, derived from the Scala REPL (read-eval-print-loop) | * **FCL**: **F**irrtl **C**ommand **L**anguage, a scripting language for firrtl transforms, derived from the Scala REPL (read-eval-print-loop) |
* **Firebox**: Novel Computer Architecture for Datacenters | * **Firebox**: Novel Computer Architecture for Datacenters |
* **FireSim**: Firebox Simulator | * **FireSim**: **Fire**box **Sim**ulator |
* **FIRRTL**: Flexible Intermediate Representation for RTL | * **FIRRTL**: **F**lexible **I**ntermediate **R**epresentation for **RTL** |
* **Generator**: A program that generates hardware descriptions | * **Generator**: A program that generates hardware descriptions |
* **Hammer**: | * **Hammer**: Physical design generator. |
* **HCL**: Hardware construction Languaware | * **HCL**: **H**ardware **C**onstruction **L**anguage. Generate hardware using better parameterizable hardware abstractions |
* **HLS**: High-Level-Synthesis, attempts to create hardware from analysis of an algorithmic descrip HCL | * **HLS**: **H**igh **L**evel **S**ynthesis, attempts to create hardware from analysis of an generic algorithmic description. In contrast to **HCL** |
* **Hwacha**: Generator for RISC-V vector architecture | * **Hwacha**: Generator for RISC-V vector architecture |
* **LAMP**: Linux-Apache-MySQL-PHP a software stack that is you need for a complete website. The pieces are now quite fungible. | * **LAMP**: **L**inux-**A**pache-**M**ySQL-**P**HP a software stack that is you need for a complete website. The pieces are now quite fungible. |
* **Rocket-Chip**: Generator for RISC-V scalar architecture | * **Rocket-Chip**: Generator for RISC-V scalar architecture |
* **Shenzhen**: | * **Shenzhen**: |